The present application relates to automated testing of integrated circuits, and more particularly to a method and system to test clock and aperture jitter in such devices as analog-to-digital converters and sample and hold circuits.
1. Background: Jitter
Jitter refers to the presence of abrupt, spurious variations in the amplitude or frequency of a periodic signal. This noise, when introduced in a system, can cause inaccurate results or other problems. Some noise will be present in any system, but if some or all of the noise can be measured, then it can be reduced or compensated for. The present application relates to means to measure noise caused by clock and aperture jitter.
2. Background: Jitter Measurement
Clock jitter has previously been measured using one of several techniques.
A first technique is to observe the spectral spreading or smearing around the spectral components of the clock. This technique is mainly used for circuits which must avoid generating energy in unwanted frequency bands. An example would be a cellular phone frequency synthesizer, which must produce a very pure sine wave which does not fail FCC compliance tests. This technique is unable to relate spectral spreading to time jitter, in RMS seconds.
A second commonly used technique is to slowly sweep the strobe signal of a strobed comparator across the rising or falling edge of the clock, capturing thousands of I/O outputs from the comparator. On a rising edge, the I/O sequence would start out with all 0's and then transition to all 1's. The percentage of 1's and 0's at each sweep position are recorded into a mathematical array. Then the derivative of the array provides the jitter histogram, from which the standard deviation of the jitter can be measured. This technique is very accurate, but requires a long test time because of the thousands of 1's and 0's that must be collected.
A third commonly used approach is to directly digitize the time intervals of the clock using a time digitizer. This type of circuit generally uses a time stretcher, which charges a capacitor with a fixed DC current for the time period to be measured and then discharges the capacitor with a small fraction of the DC current. The time required to discharge the capacitor is much easier to measure than the original time interval. Achieving one-shot measurements in the 20 ps range using this technique is very difficult, however. It is also very expensive.
A fourth technique involves digitization of multiple samples of the same point on a steeply rising edge with a constant slope (i.e., a very fast ramp). In this case, the voltage noise is related to the jitter by a very simple dv/dt relationship. This technique suffers from two problems. First the slope of the rising edge must be calibrated accurately, which is difficult to do. Second, there is no way to extract the voltage noise inherent to the digitization process from the jitter noise, since they both appear as voltage noise.
Innovative System and Methods for Measuring Jitter
The present application discloses an innovative system and method for measuring jitter. One class of embodiments is particularly useful for testing the aperture jitter of a high speed Analog to Digital (A/D) converter. Aperture jitter in a Sample and Hold circuit (S/H) or in an A/D converter introduces noise into the sampled signal. The noise is more extreme in areas of the input waveform that have a steep positive or negative slope. The preferred embodiment allows an easy and inexpensive way to measure aperture jitter in S/H and A/D circuits. The technique can also be adapted for measuring edge jitter in digital clock signals or in analog sine wave signals.